AICAS 2026's Final Conference Program

Tutorials, September 14, 2026


Tutorials: Monday, 14 September 2026 (free for all AICAS participants)
Venue: 144 Xuan-Thuy Road, Cau Giay Ward, Hanoi, Vietnam

9:00:00 AM-9:15:00 AM

Opening Session
Room: 1st Floor,  Jonathan KS Choi Culture Center, VNU Hanoi

9:15 AM-6:00 PM

Tutorial #1: AI-Enabled IC Design Automation and Intelligent Hardware Architectures
Chairs: Minh-Thuy Le, HUST, Vietnam
Quang-Kien Trinh, LQDTU, Vietnam
Room: 1st Floor,  Jonathan KS Choi Culture Center, VNU Hanoi

Tutorial #2: High-Speed Interconnect and Clock Circuits for AI Computing Infrastructures
Chairs: Du Yuan, Nanjing University, China;
Duc-Tho Mai, ACT, Vietnam
Room: 2nd Floor, Jonathan KS Choi Culture Center, VNU Hanoi

9:15 AM - 10:15 AM

Hardware-Assisted Verification for Next-Generation AI Hardware Accelerators
Ibrahim Elfadel, Khalifa University, United Arab Emirates

Introduction to High-Speed SerDes Communications
Quan Pan, Southern University of Science and Technology, China

10:15 AM

Tea Break (15 minutes)

10:30 AM-11:30 AM

AI-Driven Shift-Left for Circuit and System Design
Xinfei Guo, Shanghai Jiao Tong University, China

High-Speed Ultra-Low Latency Mixed-Signal SerDes Transceiver Design Techniques for AI Computing Infrastructures
Xiaoyan Gui, Xi’an Jiaotong University, China

11:45 AM

Lunch

1:15 PM - 2:15 PM

AI for Analog IC Design Automation: Evolution and Open Challenges
Nuno Horta, University of Lisbon, Portugal

Clock Generation Techniques for High-Speed Wireline Transceivers
Hao Xu, Fudan University, China

2:15 PM - 3:15 PM

Bio-inspired Neuromorphic Olfaction: From Algorithms to Chips
Hong Chen, Tsinghua University, China

Clock and Data Synchronization Techniques for High-Performance Interconnection
Xiaoteng Zhao, Xidian University, China

3:15 PM

Tea Break (15 minutes)

3:30 PM - 4:30 PM

Product-Ready Neuromorphic MCU at the Sensor Edge
Amir Zjajo, Innatera Nanosystems B.V., the Netherlands

Design of Power-Efficient Reference-less PAM4 CDR for Ultra-High-Speed Wireline Communication
Zhao Zhang, Institute of Semiconductors, Chinese Academy of Sciences, China

4:30 PM - 5:30 PM

Reconfigurable Accelerator Design for Multi-Precision Floating-Point Computing: From Processing Elements to SME-Oriented Architectures
Wei Mao, Xidian University, China

Optical Receiver Front-Ends for AI Interconnect: Scenarios, Tradeoffs, and Design Guidelines
Dan Li, Xi’an Jiaotong University, China

5:30 PM - 6:00 PM

AI-Driven EDA: Reshaping Chip Design in the AI Era
Tran Thuy Vy, Cadence Vietnam

 

Day 1, September 16, 2026


Day 1: Wednesday, 16 September 2026
Venue: Wyndham Legend Halong Hotel
Address: 12 Ha Long Street, Bai Chay Ward, Quang Ninh Province 02033

8:30 AM-5:00PM

Live demonstration & Exibits
Venue: Diamond 2

Time

Paper #

Title

Authors

Type

Whole day

1571274451

Live Demonstration: A Hardware-Efficient Arc Early Detection System via DWT-ConvLSTM at Edge

Zhenhao Wang, Xuhui Du and Jialong Wang (Xidian University, China); Fan Jiang and Xian Ding (Beijing Smart-Chip Microelectronics Technology Co., Ltd); Xiaoxi Li, Xiguang Wu, Bo Li, Yan Liu, Wei Mao and Genquan Han (Xidian University, China)

Exhibit

Whole day

1571274667

Live Demonstration: Edge-Deployed Compound AI with RAG for High-Accuracy Embodied Robotic Planning

Yitong Shen, Mingde Duan, Zhenhao Wang, Yingjie Zhao, Yanwen Ding and Xuhui Du (Xidian University, China); Sai Zhang (Junhe Technology (Quzhou) Co., Ltd.); Xiguang Wu, Bo Li, Yan Liu, Wei Mao and Genquan Han (Xidian University, China)

Exhibit

Whole day

1571306695

Live Demonstration: A Real-Time Reservoir Processor on FPGA for Edge Temporal Prediction

Yucen Shi, Yuncheng Lu, Zehao Li, Junying Li and Tony Tae Hyoung Kim (Nanyang Technological University, Singapore)

Exhibit

Whole day

-

Huawei exhibition

Haonan Zhang (Huawei, China)

Exhibit

Whole day

-

CASS Vietnam Chapter

Manh-Hiep Dao, Vietnam National University, Hanoi

Exhibit

9:00 AM - 9:30 AM

Conference Opening & GC/TPC Reporting

9:30 AM - 10:30 AM

Keynote #1: From Design Automation to Autonomous Design: AI Super Agents for Chip Development
Ziyad Hanna
Corporate VP, System Design Verification and AI Technologies at Cadence Design Systems
Venue: Diamond 1
Chairs: Du Li, Nanjing University, China

10:30 AM

Tea break

11:00 AM - 12:00 PM

Keynote #2: Learning from Biology - Neuromorphic Techniques for an Intelligent Vision System: Using Obstacle Avoidance as an Example
Kea-Tiong (Samuel) Tang
National Tsing Hua University, Taiwan
Venue: Diamond 1
Chairs: Xuan-Tu Tran, Vietnam National University, Hanoi

12:00 PM

Lunch

1:30 PM-2:45 PM

Session #1: AI Circuits and Systems for Robotics and Automation  (4 papers)
Venue: Panorama 1
Chairs:  Yuhang Zhang, East China Normal University, China

Time

Paper #

Title

Authors

Type

1:30 PM

1571268204

A 40 µA, 1-14 V Load-Adaptive in-Situ Neural Stimulator

Dawei Li, Yao Zhou and Ziyu Chen (South-Central Minzu University, China); Dongqin Deng (Wuhan University, China); Li Zhang (Hubei University of Technology, China); Yuan Du and Li Du (Nanjing University, China); Dongsheng Liu (Huazhong University of Science and Technology, China)

Oral

1:45 PM

1571267971

GAP-KV: Granularity-Aware Pruning for Chunk-Level KV Cache Compression in Long-Context LLMs

Hakyeong Lee, Sangbeom Jeong and Hyun Kim (Seoul National University of Science and Technology, Korea (South))

Oral

2:00 PM

1571268277

Lightweight Pallet Detection and Pose Estimation Technology for Pallet Truck Automated Guided Vehicles

Jize Liu, Zherong Liu (University of Electronic Science and Technology of China (UESTC), China); Tianyi Zhao (Chengdu Ruixinxing Technology Co., Ltd., China); Wentao Fan (University of Electronic Science and Technology of China (UESTC), China); Jiayao Huang (Chengdu Ruixinxing Technology Co., Ltd., China); Hang Chen, Haoxiang Long and Bozhang Hua (University of Electronic Science and Technology of China (UESTC), China); Yu Long and Ling Xu (Chengdu Ruixinxing Technology Co., Ltd., China); Ye Liu and Jun Zhou (University of Electronic Science and Technology of China (UESTC), China);

Oral

2:15 PM

1571274040

Embedded AI Architecture Evaluation for in-Barn Real-Time Bovine Mastitis Detection at the Edge

Francois Gonothi Toure, Abdoulaye Baniré Diallo and Mounir Boukadoum (Université du Québec à Montréal, Canada)

Oral

1:30 PM-2:45 PM

Session #2: AI for Circuits and Systems I (5 papers)
Venue: Panorama 2
Chairs: Jinming Lu, Nanjing University, China

Time

Paper #

Title

Authors

Type

1:30 PM

1571252614

Beyond Iterative Search: Intelligent Generative GATv2 Framework for Analog Sizing

Fan Hu, Shaik Jani Babu and Xinfei Guo (Shanghai Jiao Tong University, China)

Oral

1:45 PM

1571264263

Curriculum Learning as an Enabling Methodology for Reinforcement Learning in Analog Circuit Sizing

Douglas Mateus Machado, Nathan Chanez and Severin Trochut (STMicroelectronics, France);  Paul Chollet (Télécom Paris, France); Roberto Guizzetti and Pascal Urard (STMicroelectronics, France); Van-Tam Nguyen (Télécom Paris, France)

Oral

2:00 PM

1571268026

20 Hours from Spec to Schematic: A Fully Automated Design Framework for Continuous-Time Sigma-Delta Modulators

Yuxuan Zhang, Chen Wang, Zhuohua Liu and Yuanqi Hu (Beihang University, China); Wei W. Xing (University of Sheffield, United Kingdom (Great Britain))

Oral

2:15 PM

1571268245

PIECE: Projection-Invariant Normalization for Energy-Aware Compression in Efficient Transformer Inference on Chiplets

Tzu-Ching Yang, Jiing-Ping Wang and An-Yeu (Andy) Wu (National Taiwan University, Taiwan)

Oral

2:30 PM

1571268458

Multimodal Graph-Image Reinforcement Learning for VLSI Macro Placement

Yi-Syuan Shih (National Central University, Taiwan); Yu-Guang Chen (National Tsing Hua University, Taiwan); Jia-Sin Pan (National Central University, Taiwan); Shih-Cheng Huang, Cheng-Hong Tsai and De-Shiun Fu (Global Unichip Corporation, Taiwan); Mango Chia-Tso Chao (National Yang Ming Chiao Tung University, Taiwan)

Oral

1:30 PM-2:45 PM

Session #3: Emerging applications: IoT, healthcare, smart factories, environment, robotics, autonomous vehicles, drones, AR/VR, metaverse I (4 papers)
Venue: Diamond 1
Chairs: Zhen Zhuang, The Chinese University of Hong Kong, China

Time

Paper #

Title

Authors

Type

1:30 PM

1571268406

PanLUNA: An Efficient and Robust Query-Unified Multimodal Model for Edge Biosignal Intelligence

Marija Zelic; Anna Tegon; Yawei Li; Thorir Mar Ingolfsson; Luca Benini (ETH Zürich, Switzerland)

Oral

1:45 PM

1571250142

MAPLE: Efficient Agglayer Proving via off-Chain Pre-Verification for Metaverse Multi-Chain Systems

Huyen Nguyen, Lan Ngoc Le, Khoa Tan VO, Thu Nguyen and Tu-Anh Nguyen-Hoang (University of Information Technology - VNU-HCM, Vietnam)

Oral

2:00 PM

1571264335

Adaptive Routing for Efficient Diffusion Transformer-Based PNI Prediction

Youngung Han (Seoul National University, Korea (South) & OUTTA, Korea (South)); Dohyun Kweon (Kyung Hee University, Korea (South)); Kyeonghun Kim (OUTTA, Korea (South)); Hyunsu Go, Jina Jeong and Suah Park (Seoul National University, Korea (South)); Induk Um (Chung-Ang University, Korea (South)); Junga Kim, Anna Jung and Yului Jeong (Seoul National University, Korea (South)); Sungha Park (Seoul National University School of Medicine, Korea (South) & Seoul National University, Korea (South)); Jinyong Jun (Seoul National University, Korea (South)); Pa Hong (Samsung Changwon Hospital, Korea (South)); Woo Kyoung Jeong (Samsung Medical Center, Korea (South)); Won Jae Lee (Samsung Medical Center, Sungkyunkwan University School of Medicine, Korea (South)); Ken Ying-Kai Liao (NVIDIA, Taiwan); Hyuk-Jae Lee and Nam-Joon Kim (Seoul National University, Korea (South))

Oral

2:15 PM

1571264882

HLCFN-PAD: Hybrid Loss-CBAM Model for Partial Fingerprint anti-Spoofing

Dao-Heng Luo and Ching-Te Chiu (National Tsing Hua University, Taiwan); Ned Lin, Ang Yu, Paul Lai and Daniel Chen (FocalTech Electronics Co., Ltd., Taiwan); Shao-En Lin (National Tsinghua University, Taiwan)

Oral

1:30 PM-2:45 PM

Session #4:  Circuits and systems for AI I (5 papers)
Venue: Diamond 3
Chairs: HaiLong Jiao, PKU, China

Time

Paper #

Title

Authors

Type

1:30 PM

1571263159

PHSim: An Efficient Simulator for LLM Inference on PIM-Based Heterogeneous Systems

Yueqi Zhang (Nanjing University, China); Chao Fang (KU Leuven, Belgium); Xianshi Jiang, Jie Chen and Yichuan Bai (Nanjing University, China); Peng Qin, Dawei Wang and Xu Zhang (Intel Labs, China); Yuan Du and Li Du (Nanjing University, China)

Oral

1:45 PM

1571265653

AP-Rec: Adaptive Dual-Path Inference for Scalable Multi-GPU Recommendation Systems

Jiyou Hwang, Jongmin Seok and Chae Eun Rhee (Hanyang University, Korea (South))

Oral

2:00 PM

1571267418

An Accurate Yet Compact Softmax Hardware Implementation Optimized for Microscaling Data Format

Meng-Hsun Hsieh and Juinn-Dar Huang (National Yang Ming Chiao Tung University, Taiwan)

Oral

2:15 PM

1571268062

A Lightweight Accelerator for Kolmogorov-Arnold Transformers in Edge Inference

Chengxing Fan, Xuliang Yu and Jie Hu (Zhejiang University, China); Wei-Han Yu (University of Macau, Macao); Liang Zhao (Zhejiang University, China)

Oral

2:30 PM

1571268419

AMBER: Thermal-Aware Spatio-Temporal Scheduling for Edge LLM Inference on 3D DRAM-on-NPU Systems

Xuanda Lin, Siyao Jia and Haozhe Zhu (Fudan University, China); Xinru Jia (CiMicro.Ai, China); Shiwei Liu (Tongji University); Chixiao Chen (Fudan University, China)

Oral

2:45 PM

Tea break

3:15 PM - 4:15 PM

Session #5: Computer vision algorithms and architectures I (4 papers)
Venue: Panorama 1
Chairs: Duc-Tho Mai, Academy of Cryptography, Vietnam

Time

Paper #

Title

Authors

Type

3:15 PM

1571254629

ADORE-VLM: Attention-Dynamics-Oriented Re-Entry-Based Early Exiting for Accelerating Vision-Language Model Inference

Tackwoo Nam, Gilha Lee and Hyun Kim (Seoul National University of Science and Technology, Korea (South))

Oral

3:30 PM

1571264329

Anatomy-Privileged Distillation with Token Routing for MRI-Based Prediction of Perineural Invasion

Hyunsu Go (Seoul National University, Korea (South)); Youngung Han (Seoul National University, Korea (South) & OUTTA, Korea (South)); Kyeonghun Kim (OUTTA, Korea (South)); Junga Kim (Seoul National University, Korea (South)); Dohyun Kweon (Kyung Hee University, Korea (South)); Jinyong Jun (Seoul National University, Korea (South)); Sungha Park (Seoul National University School of Medicine, Korea (South) & Seoul National University, Korea (South)); Anna Jung (Seoul National University, Korea (South)); Induk Um (Chung-Ang University, Korea (South)); Yului Jeong, Suah Park, Jina Jeong and Suemin Yang (Seoul National University, Korea (South)); Pa Hong (Samsung Changwon Hospital, Korea (South)); Woo Kyoung Jeong (Samsung Medical Center, Korea (South)); Won Jae Lee (Samsung Medical Center, Sungkyunkwan University School of Medicine, Korea (South)); Ken Ying-Kai Liao (NVIDIA, Taiwan); Hyuk-Jae Lee and Nam-Joon Kim (Seoul National University, Korea (South))

Oral

3:45 PM

1571264333

SpikeDS: Dual Sparsity Spikformer for Perineural Invasion Prediction in 3D MRI

Induk Um (Chung-Ang University, Korea (South)); Youngung Han (Seoul National University, Korea (South) & OUTTA, Korea (South)); Kyeonghun Kim (OUTTA, Korea (South)); Yului Jeong, Jina Jeong and Hyunsu Go (Seoul National University, Korea (South)); Dohyun Kweon (Kyung Hee University, Korea (South)); Sungha Park (Seoul National University School of Medicine, Korea (South) & Seoul National University, Korea (South)); Junga Kim, Anna Jung, Suah Park and Hyuk-Jae Lee (Seoul National University, Korea (South)); Pa Hong (Samsung Changwon Hospital, Korea (South)); Woo Kyoung Jeong (Samsung Medical Center, Korea (South)); Won Jae Lee (Samsung Medical Center, Sungkyunkwan University School of Medicine, Korea (South)); Ken Ying-Kai Liao (NVIDIA, Taiwan); Nam-Joon Kim (Seoul National University, Korea (South))

Oral

4:00 PM

1571267460

Robust Image Classification Under Complex Illumination: A FastViT Framework with Sharpness-Aware Minimization

Bohan Guo, Chaoyao Shen, Yuning Ji, Yu Liang and Meng Zhang (Southeast University, China)

Oral

3:15 PM - 4:15 PM

Session #6  Special Session:  AI-Powered Electronic Design Automation for IC Design I (4 papers)
Venue: Panorama 2
Chairs: Bo Li, Xidian University, China

Time

Paper #

Title

Authors

Type

3:15 PM

1571266792

SafeRTL: IP-Preserving Verilog Optimization via Principle-Guided Local-Cloud LLM Framework

Jing Wang (Nanjing University of Posts and Telecommunications, China); Zheng Li (Fudan University, China); Lei Li (The University of Hong Kong, Hong Kong); Fan He and Liyu Lin (Fudan University, China); Yao Lai (The University of Hong Kong, Hong Kong); Jiafei Yao (Nanjing University of Posts and Telecommunications, China); Yan Li and Xiaoyang Zeng (Fudan University, China); Yufeng Guo (Nanjing University of Posts and Telecommunications, China)

Oral

3:30 PM

1571268118

Efficient Machine Learning-Driven RF Post-Layout Prediction via Bidirectional State-Space Vision Mamba

Hoang Trong Nguyen, Lihong Zhang and Trung Q. Duong (Memorial University of Newfoundland, Canada)

Oral

3:45 PM

1571268248

AI Chip Design Tool with Self-Learning Capability for FinFET Advanced Processes

Dan Liu, Qian Wu and Xiaoshi Zhao (Beijing Tango Software Technology Company, China)

Oral

4:00 PM

1571268363

Chiplet-NSRL: A Neuro-Symbolic Reinforcement Learning Approach for Interpretable Design Space Exploration of Chiplet-Based AI Accelerator

Ruifeng Zhang, Bo Li, Xiguang Wu and Wei Mao (Xidian University, China); Guoyong Shi (Shanghai Jiao Tong University, China); Yan Liu and Genquan Han (Xidian University, China)

Oral

3:15 PM - 4:00 PM

Session #7: AI for Future Wireless Communications (2 papers)
Venue: Diamond 1
Chairs: Yuhang Zhang, East China Normal University, China

Time

Paper #

Title

Authors

Type

3:15 PM

1571268896

Digital Predistortion Design with Lightweight Variation-Aware Network for Sub-THz Band

Tian Sheuan Chang and Tzu-Chia Tseng (National Yang Ming Chiao Tung University, Taiwan)

Oral

3:30 PM

1571272151

A Binary Matrix Optimization Framework for the Automated Design of Broadband Microstrip Resonators

Fu Qi Chua (Universiti Malaya, Malaysia); Chao Wang and Jinghua Zhang (Shanghai Jiao Tong University, China); Kian Kit Cheah and Harikrishnan Ramiah (Universiti Malaya, Malaysia); Yongfu Li (Shanghai Jiao Tong University, China)

Oral

3:15 PM - 4:15 PM

Session #8 Special Session: Emerging Energy-Efficient Hardware and Computing Paradigms for Edge Intelligence I (4 papers)
Venue: Diamond 3
Chairs: Manh-Hiep Dao, VNU, Vietnam;

Time

Paper #

Title

Authors

Type

3:15 PM

1571268395

A Novel Delta-Sigma Computing-in-Memory Macro Based on FeRAM for Edge Computing

Huanning Zhang, Bo Li, Xiguang Wu, Wei Mao, Xiao Yu, Bing Chen, Yan Liu and Genquan Han (Xidian University, China)

Oral

3:30 PM

1571268472

SpikeLogBERT: Energy-Efficient Log Parsing Using Spiking Transformer Networks

Thuan Bui and Duong Do (Swinburne Vietnam, FPT University, Vietnam); Tung Vu (Posts and Telecommunications Institute of Technology, Vietnam); Duc-Tho Mai (Academy of Cryptography Techniques, Vietnam); Cong-Kha Pham (University of Electro-Communications (UEC), Japan)

Oral

3:45 PM

1571268951

A Real-Time Vietnamese Speech Acquisition and Recognition System for Control Applications on FPGA Technology

Dang-Quang Nguyen, The-Anh Nguyen, Duy-Hieu Bui and Xuan-Tu Tran (Information Technology Institute, Vietnam National University, Hanoi)

Oral

4:00 PM

1571273751

MRTPE: A 28nm 131.76 TOPS/W and 8 Core RISC-V DNN Inference Processor with Multiple RISC-V Transformational Mechanism

Zhou Wang (Imperial Global Singapore, Imperial College London); Jiuren Zhou and Xiguang Wu (Xidian University, China); Xiaonan Tang (Wisemaytech, China); Shushan Qiao (Institute of Microelectronics of the Chinese Academy of Sciences, China); Tianchun Ye (IME-CAS, China); Anil A Bharath (Imperial College & Cortexica Vision Systems, United Kingdom (Great Britain)); Emm Mic Drakakis (Imperial College London, United Kingdom (Great Britain))

Oral

4:15 PM

Tea break

4:30 PM-5:45 PM

Session #9: Architecture for AI computing I (5 papers)
Venue: Panorama 1
Chairs:  Zhou Wang, Imperial Global Singapore of Imperial College London, Youngmin Kim, Hongik University, Korea

Time

Paper #

Title

Authors

Type

4:30 PM

1571264636

KV Cache Management for Block Diffusion Language Models on Multi-Level NV-Memory

Masafumi Higashi, Shota Suzuki, Yuya Yamamoto, Naoko Misawa, Chihiro Matsui and Ken Takeuchi (The University of Tokyo, Japan)

Oral

4:45 PM

1571268263

A Low-Power Sparse Convolution Accelerator with Idle-First-Task-Assignment for Edge Vision

Jingyue Zhuge (TUD Dresden University of Technology, Germany & ScaDS.AI, Germany); Johannes Partzsch (TUD Dresden University of Technology, Germany); Christian Mayr (TU Dresden, Germany)

Oral

5:00 PM

1571268280

Sub-100KB on-Device CNN Training via Dynamic Sparse Updates and Hardware--Software Co-Design

Tian Sheuan Chang and I-Hsuan Li (National Yang Ming Chiao Tung University, Taiwan)

Oral

5:15 PM

1571268292

A Multi-Precision Accelerator for Partial Differential Equations Solving with Collaborative Physics-Informed Neural Networks and Finite Difference Methods

Yichuan Bai, Botao Wu and Xiaoyu Chang (Nanjing University, China); Chongkang Tan (Ant group, China); Yuan Du and Li Du (Nanjing University, China)

Oral

5:30 PM

1571274252

When NPUs are Not Always Faster: A Stage-Level Analysis of Mobile LLM Inference

Pu Li, Jiawen Qi and Qinyu Chen (Leiden University, The Netherlands)

Oral

4:30 PM-5:45 PM

Session #10: Hardware/Software Co-Design and Design Automation for AI systems I (5 papers)
Venue: Panorama 2
Chairs: Yichuan Bai, Nanjing University, China

Time

Paper #

Title

Authors

Type

4:30 PM

1571265285

DISA: Algorithm-Hardware Co-Design of a Sparsity-Induced Deep Unfolding Network for Edge Compressive Sensing

Xuewei Cao, Wenbiao Zhou, Fengchi Lu, Wenxuan Niu and Zhihan Zhang (Beijing Institute of Technology, China)

Oral

4:45 PM

1571266794

SHIELD: A Segmented Hierarchical Memory Architecture for Energy-Efficient LLM Inference on Edge NPUs

Jintao Zhang and Xuanyao Fong (National University of Singapore, Singapore)

Oral

5:00 PM

1571267994

NPN-ApproxLib: DNN-Aware Approximate Multiplier Design via NPN Classes

Sallar Ahmadi-Pour, Chandan Kumar Jha and Sajjad Parvin (University of Bremen, Germany); Rolf Drechsler (University of Bremen/DFKI, Germany)

Oral

5:15 PM

1571268453

DiffABCO: Shift-Left Wafer-Scale Integration Design via Differentiable Architecture-Backend Co-Optimization

Zhen Zhuang (Chinese University of Hong Kong, Hong Kong); Zheng Yang (Georgia Institute of Technology, USA); Kai-Yuan Chao (Siemens Digital Industries Software, USA); Tsung-Yi Ho (The Chinese University of Hong Kong, Hong Kong)

Oral

5:30 PM

1571268123

SNN2Bitstream: Automated Model-to-FPGA HLS-Based Framework for Spiking Neural Network Hardware Accelerators

Xindan Zhang, Ioannis Kaskampas, Andrea Pinna and Haralampos-G. Stratigopoulos (Sorbonne Université, CNRS, LIP6, France)

Oral

4:30 PM-5:45 PM

Session #11: Emerging computing devices and materials for AI (6 papers)
Venue: Diamond 1
Chairs: Hua Fan, UESTC, China

Time

Paper #

Title

Authors

Type

4:30 PM

1571268285

Dual-Channel-Shared OFA-p-SOT-MRAM CIM Macro for High-Throughput Binary Similarity Search in LLM KV-Cache Compression

Fantao Gao, Cancheng Xiao, Dingsong Jiang, Xun Tang and Jiahao Zhao (Tsinghua University, China); Tao Yang (ENFI Engineering Corporation, China); Jianshi Tang (Tsinghua University, China); Tianxiang Nan (School of Integrated Circuits, Tsinghua University, China)

Oral

4:45 PM

1571274339

Neural Sequence Models for Memristor State Variable Modelling and Prediction

Rishabh Mallik and Ming-Jay Yang, Stephan Menzel, Emre Neftci, John Paul Strachan (Peter Grunberg Institute, Forschungszentrum Julich, Germany)

Oral

5:00 PM

1571264447

TinyGLASS: Real-Time Self-Supervised in-Sensor Anomaly Detection

Pietro Bonazzi (ETH Zurich, Switzerland); Rafael Sutter (ETH Zürich, Switzerland); Luigi Capogrosso (Interdisciplinary Transformation University of Austria, Austria); Mischa Buob (Swiss Engineering Partners AG, Switzerland); Michele Magno (ETH Zurich, Switzerland)

Oral

5:15 PM

1571268343

A Transposable VC-SOT-MRAM CIM Macro for Edge AI Tasks with High Linearity

Bingqian Song, Cancheng Xiao, Yiyuan Xiao, En Li, Jiahao Zhao, Yining Li, Yuheng Yang and Jianshi Tang (Tsinghua University, China); Qi Hu (Beijing Superstring Academy of Memory Technology, China); Tianxiang Nan (School of Integrated Circuits, Tsinghua University, China)

Oral

5:30 PM

1571268494

A Hardware-Oriented Event-Driven Gesture Recognition System with a Geometry-Token Early-Exit Classifier for a Perovskite Vision Platform

Junying Li and Chufeng Yang (Nanyang Technological University, Singapore); Kyung-Chan An (Seokyeong University, Korea (South)); Yuncheng Lu and Kiho Seong (Nanyang Technological University, Singapore); Ng Si En Timothy (Stanford University, USA); Shibi Varku, Natalia Yantara and Qinjie Wu (Nanyang Technological University, Singapore); Arindam Basu (City University of Hong Kong, Germany); Nripan Mathews and Tony Tae Hyoung Kim (Nanyang Technological University, Singapore)

Oral

5:45 PM

1571268512

3D Monolithic Integrated SNN for Ultra-Low Energy ECG Arrhythmia Classification

Shreesh Shrinivas Nagral (Indian Institute of Technology, Bombay, India); Harshitha Gangu, Laxmeesha Somappa and Veeresh Deshpande (Indian Institute of Technology Bombay, India)

Oral

4:30 PM-5:45 PM

Session #12: In-Memory Computing I (5 papers)
Venue: Diamond 3
Chairs:  Bo Li, Xidian University, China

Time

Paper #

Title

Authors

Type

4:30 PM

1571265000

Analysis of Accuracy, Precision, and Error Sources in Bitline Voltage Regulator for AIMC Accelerators

Berk Bozkurt and Riccardo Vignali (University of Pavia, Italy); Riccardo Zurla (STMicroelectronics, Pavia, Italy); Marco Pasotti (STMicroelectronics, Agrate Brianza, Italy); Andrea Lico and Alessio Antolini (ARCES-DEI, University of Bologna, Italy); Eleonora Franchi (University of Bologna, Italy); Alessandro Cabrini (University of Pavia, Italy)

Oral

4:45 PM

1571266241

A 15.7TOPS/W NAND Flash-Based Process-in-Memory Featuring a Time-Domain Computation Unit

Hyuk-Jin Lee and Kyunghoon Pyo (Korea Advanced Institute of Science & Technology, Korea (South)); SeongHwan Cho (Korea Advanced Institute of Science and Technology (KAIST), Korea (South))

Oral

5:00 PM

1571267829

NV-Memory Centric Liquid Neural Network Accelerator for Reflexive Robotic Control

Yuya Yamamoto, Naoko Misawa, Chihiro Matsui and Ken Takeuchi (The University of Tokyo, Japan)

Oral

5:15 PM

1571268180

PSD: Pairwise Signed-Digit for SRAM-Based Digital Compute-in-Memory with OR-Approximated Adder Tree

Jiing-Ping Wang and An-Yeu Wu (National Taiwan University, Taiwan)

Oral

5:30 PM

1571268234

An Energy-Efficient Multi-Edge Multi-Input Delay Cell with Asymmetric Parasitic Compensation for TD-CIM

Junyeong Heo, Joo Hyeon Jeon, Sung In Cho and Jinwook Burm (Sogang University, Korea (South))

Oral

7:00 PM

Welcome reception
Shuttle buses will depart at the conference venue (the hotel’s lobby) from 18:00 to the restaurant.

Day 2, September 17, 2026


Day 2: Thursday, 17 September 2026
Venue: Wyndham Legend Halong Hotel
Address: 12 Ha Long Street, Bai Chay Ward, Quang Ninh Province 02033

8:30 AM-5:00PM

Live demonstration & Exibits
Diamond 2

Time

Paper #

Title

Authors

Type

Whole day

1571274451

Live Demonstration: A Hardware-Efficient Arc Early Detection System via DWT-ConvLSTM at Edge

Zhenhao Wang, Xuhui Du and Jialong Wang (Xidian University, China); Fan Jiang and Xian Ding (Beijing Smart-Chip Microelectronics Technology Co., Ltd); Xiaoxi Li, Xiguang Wu, Bo Li, Yan Liu, Wei Mao and Genquan Han (Xidian University, China)

Exhibit

Whole day

1571274667

Live Demonstration: Edge-Deployed Compound AI with RAG for High-Accuracy Embodied Robotic Planning

Yitong Shen, Mingde Duan, Zhenhao Wang, Yingjie Zhao, Yanwen Ding and Xuhui Du (Xidian University, China); Sai Zhang (Junhe Technology (Quzhou) Co., Ltd.); Xiguang Wu, Bo Li, Yan Liu, Wei Mao and Genquan Han (Xidian University, China)

Exhibit

Whole day

1571306695

Live Demonstration: A Real-Time Reservoir Processor on FPGA for Edge Temporal Prediction

Yucen Shi, Yuncheng Lu, Zehao Li, Junying Li and Tony Tae Hyoung Kim (Nanyang Technological University, Singapore)

Exhibit

Whole day

-

Huawei exhibition

Haonan Zhang (Huawei, China)

Exhibit

Whole day

-

CASS Vietnam Chapter

Manh-Hiep Dao, Vietnam National University, Hanoi

Exhibit

9:00 AM - 10:00 AM

Keynote #3: From FLOPS to Intelligence per Joule: The Case for Adaptive Dataflow
Tulika Mitra
National University of Singapore, Singapore
Venue: Diamond 1
Chairs: Duy-Hieu Bui, Vietnam National University, Hanoi

10:00 AM

Tea break

10:30 AM - 11:30 AM

Keynote #4: From Intelligence to Infrastructure: Building the Global Ecosystem for the Next AI Era
Hong-Viet Le
FPT Smart Cloud, Vietnam
Venue: Diamond 1
Chairs: Duy-Hieu Bui, Vietnam National University, Hanoi, Vietnam

11:45 AM

Lunch

1:15 PM - 2:30 PM

Session #13: Architecture for AI computing II (5 papers)
Venue: Panorama 1
Chairs: Thu-Huong Truong, HUST, Vietnam

Time

Paper #

Title

Authors

Type

1:15 PM

1571268455

Area- and Energy-Efficient Base-2 Softmax Design for DNN Inference with 1.95x Scaled Efficiency

Ting-Yi Chan, Hsiao-Jung Lin, Min-Yu Lin, Nidhi and Jinn-Shyan Wang (National Chung Cheng University, Taiwan)

Oral

1:30 PM

1571268928

CRISP: Partitioning LLM Inference Across Main Memory and HBM via Input Sparsification and Low-Rank Approximation

Koki Shibata and Shota Suzuki (The University of Tokyo, Japan); Naoko Misawa (The University of Tokyo); Chihiro Matsui (The University of Tokyo, Japan); Ken Takeuchi (The University of Tokyo)

Oral

1:45 PM

1571273686

SARA: A Scalable ASIP-Based RISC-V Architecture for Edge AI Applications

Kuan-Wei Chen, Yu-Hao Cheng, Yu-Hsiang Lee and Hsie-Chia Chang (National Chiao Tung University, Taiwan)

Oral

2:15 PM

1571274664

Low-Power GELU-Induced Dynamic Precision for Feed-Forward Networks in Transformers

Kai-Chieh Hsu and Tian Sheuan Chang (National Yang Ming Chiao Tung University, Taiwan)

Oral

1:15 PM - 2:30 PM

Session #14: AI for Circuits and Systems II (5 papers)
Venue: Panorama 2
Chairs:  Jinming Lu, Nanjing Unverisity, China

Time

Paper #

Title

Authors

Type

1:15 PM

1571268460

Distributed VLM and CNN Co-Processing for Edge AI over Non-Equalized RFSoC DAC-to-ADC Raw Channels

Muhammad Junaid, Dohyeon Kwon and Eva Cha (Daegu Gyeongbuk Institute of Science and Technology, Korea (South)); Korkut K Tokgöz (Sabanci University, Turkey & Evrim Co. Ltd., Japan); Gain Kim (DGIST, Korea (South))

Oral

1:30 PM

1571268502

Toward Resource-Efficient Spiking Neural Networks for MRI Classification

Khoa-Sang Nguyen and Quang-Kien Trinh (Le Quy Don Technical University, Vietnam); Deepu John (University College Dublin, Ireland); Dinh-Toan Le (108 Military Central Hospital, Vietnam); Thi-Thuy-Linh Le and Thi-Hong-Tham Tran (Le Quy Don Technical University, Vietnam)

Oral

1:45 PM

1571274172

Machine Learning-Assisted Design and Optimization of Tunable Bandpass LNA for Ultrasound Receiver Analog-Frontend

Xie Xinzhe (Nanyang Technological University, Singapore); Jinhai Hu (Institute of Microelectronics, Agency for Science, Technology and Research, Singapore); Zhaoyang Cao, Siqi Zhang, Jiaju Lu and Wang Ling Goh (Nanyang Technological University, Singapore); Liter Siek (Nanyang Technological University & Deputy Director, VIRTUS-IC Design Centre of Excellence, Singapore); Abdulkadir C Yucel (Nanyang Technological University, Singapore); Yuan Gao (Institute of Microelectronics, A*STAR, Singapore)

Oral

2:00 PM

1571274661

InvCal-ITF: Fast and Accurate ITF Calibration via Surrogate-Assisted Inverse Optimization

Tianyi Xu and Hongwei Yao, Bingyi Ye and Yang Shen, Xiaojin Li, Yabin Sun and Yuhang Zhang (East China Normal University, China)

Oral

2:15 PM

1571274669

MonarchGRU: A Low-Footprint Recurrent Neural Network for Audio Keyword Spotting System

Soujanya Bhowmick (Aalto University, Finland); Sangyeob Kim (Yonsei University, Korea (South)); Qinyu Chen (Leiden University, The Netherlands); Chang Gao (Delft University of Technology, The Netherlands); Kwantae Kim (Aalto University, Finland)

Oral

1:15 PM - 2:30 PM

Session #15 Circuits and systems for AI II (5 papers)
Venue: Diamond 1
Chairs: Manh-Hiep Dao, VNU, Vietnam

Time

Paper #

Title

Authors

Type

1:15 PM

1571268251

CMOS Oscillator Cluster with Analog-Tunable Coupling for Frequency-Encoded Computing

Clément Dufossée, Jean-Baptiste Begueret, Thierry Taris, Sylvain Saïghi, François Sandrez and Adrien F. Vincent (University of Bordeaux, France)

Oral

1:30 PM

1571268488

HetKey: A Cross-Device Benchmark and Edge AI Pipeline for Acoustic Keystroke Attacks

Tuan-Duc Nguyen and Thuan Bui (Swinburne Vietnam, FPT University, Vietnam); Dinh-Dung Nguyen (Swinburne Vietnam, FPT University, Hanoi, Vietnam); Tung Vu (Posts and Telecommunications Institute of Technology, Vietnam); Long Pham and Duc-Tho Mai (Academy of Cryptography Techniques, Vietnam); Cong-Kha Pham (University of Electro-Communications (UEC), Japan)

Oral

1:45 PM

1571273620

Hardware Acceleration of Layer Normalization on SoC for Artificial Intelligence on the Edge

Ettore Napoli and Efstratios Zacharelos (University of Salerno, Italy)

Oral

2:00 PM

1571273719

A RISC-V Based Hardware Platform with CNN Acceleration for Real-Time Neonatal Seizure Detection

Lakshmi Iyer (Indian Institute of Technology, Bombay, India); Ankur Gupta, Shrey Aggarwal, Mithin K and Laxmeesha Somappa (Indian Institute of Technology Bombay, India)

Oral

2:15 PM

1571274113

High-Reliability O(1) Logic-Depth LDPC Decoder for Edge AI Storage

Yanling Jiang, Junyi Wang, Xihui Qian, Zhixiong Li, Yida Li and Longyang Lin (Southern University of Science and Technology, China)

Oral

1:15 PM - 2:30 PM

Session #16 Special Session: Specialized Hardware and Systems for Edge Large Language Model Acceleration and Application, Precision-Scalable and Reliability-Aware AI Circuits for Closed-Loop Edge Autonomy, Multimedia Systems and Applications for AI (4 papers)
Venue: Diamond 3
Chairs: Quang-Kien Trinh, LQDTU, Vietnam

Time

Paper #

Title

Authors

Type

1:15 PM

1571273554

A Low-Latency and Low-Hallucination Edge Compound AI System via RAG for Embodied Robotics

Mingde Duan, Yitong Shen, Zhenhao Wang, Yingjie Zhao, Yanwen Ding and Xuhui Du (Xidian University, China); Sai Zhang (Junhe Technology (Quzhou) Co., Ltd.); Xiguang Wu, Bo Li, Yan Liu, Wei Mao and Genquan Han (Xidian University, China)

Oral

1:30 PM

1571273607

OPAL: Operator-Aware Precision-Sparsity Co-Scheduling for CIM-Based Transformer Inference

Yitong Shen, Can Liu and Yukun Fan (Xidian University, China); Jie Gan and Zhe Wang (China); Xin Jin (Beijing Smartchip Microelectronics Technology Company Limited, China); Xiguang Wu, Bo Li, Yan Liu, Wei Mao and Genquan Han (Xidian University, China)

Oral

1:45 PM

1571274655

Stochastic-LLM: Exploring Sign-Magnitude Stochastic Computing for Low-Power Edge LLM Inference on FPGAs

Yanwen Ding (Xidian University, China); Shirui Zhao (HKUST, Hong Kong); Cheng Zhang, Mingde Duan, Yitong Shen, Xuhui Du, Xiguang Wu, Bo Li, Yan Liu, Wei Mao and Genquan Han (Xidian University, China)

Oral

2:00 PM

1571276533

CIMBA: Hybrid State-Space Model Inference with Precision-Adaptive Hybrid Compute-in-Memory

Avadh Rajesh Harkishanka, Jintao Zhang, Yimin Wang and Xuanyao Fong (National University of Singapore, Singapore)

Oral

2:30 PM

Tea break

3:00 PM - 4:00 PM

Session #17: Computer vision algorithms and architectures II (3 papers)
Venue: Panorama 1
Chairs: Qing Zhang, Shenzhen University, China

Time

Paper #

Title

Authors

Type

3:00 PM

1571267969

On the Accuracy Flip of Vision Transformers Under Ultra-Low-Bit Post-Training Quantization

Hyunha Hwang, Hyuk-Jae Lee and Xuan Truong Nguyen (Seoul National University, Korea (South))

Oral

3:15 PM

1571268473

LSTA-Net: A Spatiotemporally Decoupled Network with Single-Query Transformer for Low Power Event-Based Eye Tracking

Shangyu Yang, Zhijie Jian and Yanbo Lin (Tsinghua University, China); Hong Chen (Tsinghua, China)

Oral

3:30 PM

1571273530

ASIC Functional Cell-Level Classification on Infra-Red, in-Situ (IRIS) Data for Hardware Assurance

Kakuly Mittal (Nanyang Technological University, Singapore); Andrew Huang (Baochip, Inc., Singapore); Bah Hwee Gwee (NTU, Singapore)

Oral

3:00 PM - 4:00 PM

Session #18 Special Session: AI-Powered Electronic Design Automation for IC Design II (4 papers)
Venue: Panorama 2
Chairs: Thanh-Loan Pham Nguyen, HUST, Vietnam

Time

Paper #

Title

Authors

Type

3:15 PM

1571270399

AST-GWO: Adaptive Sigmoid Transfer Grey Wolf Optimizer for Improving Search Dynamics in Logic Synthesis

Dat Tan Tran, Thuc Duy Le, Gia Huy Duong and Hoang Trang (Ho Chi Minh City University of Technology, Vietnam)

Oral

3:30 PM

1571274086

Component Centric Placement Using Deep Reinforcement Learning

Kart Leong Lim (Institute of Microelectronics, Singapore)

Oral

3:45 PM

1571274215

Multi-Objective Reinforcement-Learning-Based Fogging and Proximity-Aware Placement Method for Analog and Mixed-Signal Circuits

Mirvala Sadrafshari, Octavia A. Dobre and Lihong Zhang (Memorial University of Newfoundland, Canada)

Oral

4:00 PM

1571274985

GRPO-UVM: A Reinforcement Learning-Driven Verification Framework for AI Compute Systems

Jiaxiang Wang and Tingjie Yang (Xidian University, China); Shirui Zhao (HKUST, Hong Kong); Yingjie Zhao, Cheng Zhang, Zhenhao Wang, Jialong Wang, Xiguang Wu, Bo Li, Yan Liu, Wei Mao and Genquan Han (Xidian University, China)

Oral

3:00 PM - 4:00 PM

Session #19 Special Session: Emerging Energy-Efficient Hardware and Computing Paradigms for Edge Intelligence II (4 papers)
Venue: Diamond 1
Chairs: Xueqing Li, Tsinghua University, China

Time

Paper #

Title

Authors

Type

3:15 PM

1571273984

Energy-Efficient SNN-Based Person Detection with Adaptive Burst Suppression

Alimatou Sadia Anike Memudu (Université Côte d'Azur, France & IMRA Europe, France); Jean Martinet (Univesité Côte d'Azur, France); Yuta Nakano (IMRA europe, France)

Oral

3:30 PM

1571274209

A Novel Ferroelectric Computing-in-Memory Framework for Solving Edge Robotic Equations

Xueyang Bai, Bo Li, Xiguang Wu and Wei Mao (Xidian University, China); Guoyong Shi (Shanghai Jiao Tong University, China); Yan Liu and Genquan Han (Xidian University, China)

Oral

3:45 PM

1571274465

A Hardware-Efficient DWT-ConvLSTM Spatio-Temporal System for Arc Fault Early Detection at the Edge

Xuhui Du, Yingjie Zhao, Zhenhao Wang and Jialong Wang (Xidian University, China); Mingde Duan (Hangzhou Institute of Technology, Xidian University, China); Jie Gan and Zhe Wang (China); Xin Jin (Beijing Smartchip Microelectronics Technology Company Limited, China); Xiaoxi Li, Xiguang Wu, Bo Li, Yan Liu, Wei Mao and Genquan Han (Xidian University, China)

Oral

4:00 PM

1571275037

Hardware Implementation of Efficient Reconfigurable 2D FFT Processor for SAR Imaging

Wenbo Ding and Weiwei Shi, Bo Zhao (Shenzhen University, China)

Oral

3:00 PM - 4:00 PM

Grand Challenge SS'25
Venue: Diamond 3
Chairs: Wei Mao, Xidian University, China

Time

Paper #

Title

Authors

Type

3:15 PM

1571268392

An Ultra-Efficient Inference Pipeline for Qwen2.5 on Yitian 710: Synergizing Finetuning, Quantization and Inference Optimization

Wenyuan Zhao, Ruchao Fan, Zhao Cang, Yongming Tang and Hao Sun (Southeast University, China)

Oral

3:30 PM

1571270318

AICAS Grand Challenge 2025: Optimization and Application of Edge LLMs

Zhenhao Wang and Cheng Zhang, Tingjie Yang and Huanning Zhang (Xidian University, China); Guosheng Yu (T-HEAD Semiconductor Co., Ltd) Evens Pan (Arm Technology (China) Co., Ltd); Liang Chang (University of Electronic Science and Technology of China, China); Yuan Du and Li Du (Nanjing University, China); Zhezhi He and Yongfu Li (Shanghai Jiao Tong University, China); Bo Li and Wei Mao (Xidian University, China)

Oral

3:45 PM

1571271740

GRASP: A Gm/Id-Based Multi-Agent Reasoning Framework for Sizing Parameters in Amplifiers

Ji Zhuang, Zishuo Wang, Jinyi Shen, Zihao Chen and Fan Yang (Fudan University, China)

Oral

4:00 PM

1571273651

ELLME: A 280-Tokens/s Real-Time FPGA LLM Accelerator for End-to-End Qwen-2.5 Inference

Yujie Ma, Linqi Li, Yuman Zeng, Zhirui Huang and Chixiao Chen, Qi Liu and Haozhe Zhu (Fudan University, China)

Oral

4:00 PM

Tea break

4:15 PM - 5:45 PM

Session #20: Emerging applications: IoT, healthcare, smart factories, environment, robotics, autonomous vehicles, drones, AR/VR, metaverse II (4 papers)
Venue: Panorama 1
Chairs: Quang-Kien Trinh, LQDTU, Vietnam

Time

Paper #

Title

Authors

Type

4:15 PM

1571268423

Hardware-Aware Semantic Segmentation Engine for on-Chip Retinal Prosthesis Navigation

Arnav Agarwal (Indian Institute of Technology Bombay, India); Daksh Sawke (Indian Institute of Technology, Bombay, India); Laxmeesha Somappa (Indian Institute of Technology Bombay, India)

Oral

4:30 PM

1571268450

Enhancing Text Entry Efficiency in AR/VR with a Pinch- and Thumb-Click Gesture-Based Virtual Keyboard

Youngmock Cho, Donggyu Kim, Viduranga Munasinghe, Tae-Ho Lee and Hyuk-Jae Lee (Seoul National University, Korea (South))

Oral

4:45 PM

1571272160

QR-Coded Microstrip Antennas: End-To-End Co-Design of URL Extensions and RF Performance for IoT and IP Protection

Yuting Hou (Shanghai Jiao Tong University, China & Xi'an Railway Vocational Technical Institute, China); Chao Wang and Jinghua Zhang (Shanghai Jiao Tong University, China); Fu Qi Chua (Universiti Malaya, Malaysia); Liyuan Du (Xi'an Railway Vocational Technical Institute, China); Mayank Kumar Singh (Shanghai Jiao Tong University, China); Guoliang Feng (Xi'an Railway Vocational Technical Institute, China); Yongfu Li (Shanghai Jiao Tong University, China)

Oral

5:00 PM

1571273958

ULASC: An Ultra-Lightweight Acoustic Scene Classification Model for IoT Devices

Xiben Jiao, Yuanchang Sun, Xiaotian Wei, Fan He, Jiacheng Liang, Rui Hong, Haipeng Liu and Xingdan Cai (University of Electronic Science and Technology of China, China); Weixian Kang (Chip-Artisan Technology (Chengdu) Co. Ltd, China); Xinyi Jing, Jiahao Liu and Jun Zhou (University of Electronic Science and Technology of China, China)

Oral

4:15 PM - 5:45 PM

Session #21: Hardware/Software Co-Design and Design Automation for AI systems II (5 papers)
Venue: Panorama 2
Chairs: Zhen Zhuang, The Chinese University of Hong Kong

Time

Paper #

Title

Authors

Type

4:15 PM

1571268164

Front-End Quantization Can Recover Accuracy Under Bandwidth-Induced Covariate Shift in Keyword Spotting

Nazareno Sacchi (ETHZ - ETH Zurich, Switzerland & CSEM, Switzerland); Taekwang Jang (ETHZ, Switzerland); Komail Badami (CSEM, Switzerland)

Oral

4:30 PM

1571268199

Energy Efficient Analog Neural Network via SHAPE: Sensitivity-Aware Heterogeneous Power Allocation Framework

Leyang Jiang (Shanghai Jiaotong University, China); Siyun Ding, Ruge Xu, Xinfei Guo and Xuyang Lu (Shanghai Jiao Tong University, China)

Oral

4:45 PM

1571268380

Performance-Aware Rank Adjustment for Hardware-Friendly Fine-Tuning in Edge AI Accelerators Exploiting Sparsity and Scalability

Bo-Yang Lin and Cheng-Han Ho (National Central University, Taiwan); Pei-Yun Tsai (National Taiwan University, Taiwan)

Oral

5:00 PM

1571268438

LPAC-MoE: Lossless and Prefetch-Aware FP8 MoE Compression via Algorithm-Hardware Co-Design

Qiye Ding, Dingyang Zou and Zhongfeng Wang (Nanjing University, China)

Oral

5:15 PM

1571268065

TRACE: Temporal Reuse and Communication-Aware Mapping for Heterogeneous CIM Chiplet Systems

Zixuan Wang, Abhishek Tyagi and Xuanyao Fong (National University of Singapore, Singapore)

Oral

4:15 PM - 5:45 PM

Session #22 Special Session: Compute-in-Memory Co-Design: From Emerging Devices to AI Application Optimization (5 papers)
Venue: Diamond 1
Chairs: Quoc-Hung Nguyen, VNU, Hanoi

Time

Paper #

Title

Authors

Type

4:15 PM

1571273940

OpenMENA: An Open-Source Memristor Interfacing and Compute Board for Neuromorphic Edge-AI Applications

Ali Safa (Hamad Bin Khalifa University, Qatar); Farida Ali Mohsen (College of Science and Engineering, Qatar); Zainab Ali, Bo Wang and Amin Bermak (Hamad Bin Khalifa University, Qatar)

Oral

4:30 PM

1571274720

A CIM-Optimized Navigation Algorithm Based on Grid Cells for Edge Applications

Mu Rongjun (Zhejiang University, China); Jiabao Ye (China); Bing Chen (Xidian University, China); Yong Ding (Zhejiang University, China)

Oral

4:45 PM

1571274728

Phase-Domain Neural Computation Based on Multi-Injection Locked Oscillators

Badets Franck  (CEA, France); Kamal Danouchi (CEA-Leti, France); Jean-Baptiste Casanova (CEA-List, France)

Oral

5:15 PM

1571274868

Beyond Evolutionary Search: A General Reinforcement Learning Framework for Scalable Hardware Trojan Mitigation on Evolvable Hardware Platforms

Gaurav Ravindra Nayak and Niranjan Gopal and Madhav Rao (International Institute of Information Technology, Bangalore, India)

Oral

5:30 PM

1571274944

Modeling of Thin-Film Transistors and Memristors from Fabricated Devices with Applications in Memristor-Based Circuit Design for Neuromorphic AI Computing

Ngoc-Lam Pham Le (Vietnam National University – Hanoi); Phu-Quan Pham (Vietnam National University-HCM); Viet-An Dang, Hoang-Viet Vu, Thuat Nguyen-Tran and The-Vinh Tran (Vietnam National University – Hanoi)

Oral

4:15 PM - 5:45 PM

Grand Challenge SS'26
Venue: Diamond 3
Chairs:  Wei Mao, Xidian University, China

4:15 PM

1571332291

VersaVLM: A Phase-Specialized FPGA NPU with Log8 Attention for VLM Inference

Zhenyang Gu, Jiakun Shen, Xichen Wang, Lanqi Ma and Gengsheng Chen (Fudan University, China)

Oral

4:30 PM

1571334356

Overcoming the Kernel Launch Bottleneck: 11x Faster VLM Inference with Operator Fusion and CUDA Graphs

Thomas Yeung (TWGHs Kap Yan Directors' College, Hong Kong); YiLin Zhu (East China Normal University, China)

Oral

4:45 PM

1571335416

AICAS Grand Challenge 2026: Efficient VLM Inference on AI Chips and FPGA-Based Edge Systems

Cai Binglun (Shanghai Jiao Tong University, China); Linqi Li (Fudan University, China); Kang You (Shanghai Jiao Tong University, China); Bo Li and Wei Mao (Xidian University, China); Liang Chang (University of Electronic Science and Technology of China, China); Yuhang Zhang (East China Normal University, China); Yiming Gan (Institute of Computing Technology, Chinese Academy of Sciences, China); Shimeng Qian (Pingtouge Semiconductor Co Ltd, China); Yuan Du and Li Du (Nanjing University, China); Yongfu Li (Shanghai Jiao Tong University, China); Haozhe Zhu (Fudan University, China); Zhezhi He (Shanghai Jiao Tong University, China)

Oral

5:00 PM

1571335654

UniVLM: Unified ViT-LLM Accelerator for Efficient End-to-End VLM Inference on FPGA

Le Zhong, Linfeng Zhong, Chunbo Li, Huifeng Wen, Yunpeng Wang and Haoyang Ping (Peking University, China); Meng Li (Peking Universitu, China); Yuan Wang (Peking University, China)

Oral

5:15 PM

1571335704

End-to-End System Optimization for Low-Latency Single-Request Vision Language Model Inference

Damhyun Lee, Jongwon Lee, Yujun Heo, Sihwa Lee and Jungwook Choi (Hanyang University, Korea (South))

Oral

5:30 PM

1571335705

Memory-Centric VLM Deployment for Bandwidth-Constrained Heterogeneous Systems

Yuqi Guo (University of Electronic Science and Technology of China, China); Ruiqi Tang (Fudan University, China); Chuqi Zhao (Vanderbilt University, USA); Yucheng Sun (University of Electronic Science and Technology of China, China); Bo Yan (University of Electronic Science and Technology of China)

Oral

5:45 PM

1571335713

CASA: Context-Anchored Speculative Attention and System Co-Design for High-Throughput Vision-Language Inference

Yongkang Huang, Tianjiao Yang, Shuyan Chen and Jiang Zhu (China)

Oral

7:00 PM

Banquet & Award Ceremony
Shuttle buses will depart at the conference venue (the hotel’s lobby) from 18:00 to the restaurant.

Day 3, September 18, 2026


Day 3: Friday, 18 September 2026
Venue: Wyndham Legend Halong Hotel
Address: 12 Ha Long Street, Bai Chay Ward, Quang Ninh Province 02033

9:00 AM - 10:30 AM

Session #23: Neuromorphic and bioinspired circuits, processors, systems, and their applications I (5 papers)
Venue: Panorama 1
Chairs: Manh-Hiep Dao, VNU, Vietnam

Time

Paper #

Title

Authors

Type

9:00 AM

1571262851

BCPNNTorch: A PyTorch Simulation Framework for BCPNN-Based Associative Memory

Xiaoze Yan, Deyu Wang, Yu Zhuoquan and Huidong Ji (Fudan University, China); Yu Yang (KTH Royal Institute of Technology,, Sweden); Qi Jiang (Fudan University, China); Ahmed Hemani (Royal Institute of Technology, Sweden); Anders Lansner (Royal Institute of Technology (KTH), Sweden); Jiawei Xu (University of Macau, Macao); Lirong Zheng (Fudan University, China); Zhuo Zou (Fudan University & KTH Royal Institute of Technology, Sweden)

Oral

9:15 AM

1571267548

Adversarial Vulnerability of Neuromorphic Processors Demonstrated on Loihi Chip

Spyridon Raptis and Haralampos-G. Stratigopoulos (Sorbonne Université, CNRS, LIP6, France)

Oral

9:30 AM

1571267931

A Pulse Width Modulation-Based Compensation Circuit for Improving Linearity of Memristor Conductance Modulation

Kyusik Mun, Hyeongcheol Jo, Jaehyun Kang and Donghyuk Shin (Korea Institute of Science and Technology, Korea (South)); Joon Young Kwak (Ewha Womans University, Korea (South)); Jongkil Park, Suyoun Lee, Inho Kim, Jong-Keuk Park, Changhyuk Lee and Seongsik Park (Korea Institute of Science and Technology, Korea (South)); Hyung-Min Lee (Korea University, Korea (South)); Yeonjoo Jeong and Jaewook Kim (Korea Institute of Science and Technology, Korea (South))

Oral

9:45 AM

1571267980

A Continuous-Time QUBO Solver Using a Chain-RRAM-Based Hopfield Neural Network

Congcong Hong and Zhong Sun (Peking University, China)

Oral

10:00 AM

1571268029

Hyperdimensional Computing Training and Inference with Eight-Bit Floating-Point Formats

Andrea Marcelli and Marco Angioli (Sapienza University of Rome, Italy); Denis Kleyko (Örebro University & RISE Research Institutes of Sweden, Sweden); Marco Pisani (Sapienza University of Rome, Italy); Amy Loutfi (Örebro University, Sweden); Mauro Olivieri (Sapienza University of Rome, Italy)

Oral

9:00 AM - 10:30 AM

Session #24: In-Memory Computing II (6 papers)
Venue: Panorama 2
Chairs: Duy-Hieu Bui, VNU, Hanoi, Vietnam

Time

Paper #

Title

Authors

Type

9:00 AM

1571268332

RINAC: An Energy-Efficient Computing-in-Memory SNN Accelerator Using Redundant Input-Aware Approximate Computing

Wei-Chi Huang and Nathaniel Rensly (National Tsing Hua University, Taiwan); Meng-Fan Chang (National Tsing Hua University (NTHU), Taiwan); Kea Tiong Tang (National Tsinghua University, Taiwan)

Oral

9:15 AM

1571268483

Robust 3-Bit/Cell ReRAM CiM Against Device Non-Idealities by Discrete Shift RTN Suppression and Max Sigma Gaussian Optimized QAVAT

Elliot Yushi Abarra and Naoko Misawa (Tokyo University, Japan); Chihiro Matsui and Ken Takeuchi (The University of Tokyo, Japan)

Oral

9:30 AM

1571268509

MiSS-CiM: Mixed-Signal SRAM Based Compute-in-Memory Systolic Accelerator for Efficient DNN Inference in 2 nm GAA CMOS

Sai Shubham (Indian Institute of Technology, Bombay, India); Harsh Kakadiya, Karan Jaiswal, Megha S and Veeresh Deshpande (Indian Institute of Technology Bombay, India)

Oral

9:45 AM

1571273376

An Energy-Efficient, SCA-Resilient AES Encryption Accelerator Design with Dual-Rail SRAM LIM Macro for Edge Devices

Zhongyu He and Zixuan Shen (Huazhong University of Science and Technology, China); Nay Aung Kyaw (Nanyang Technological University, Singapore); Yuansheng Zhao (Huazhong University of Science and Technology, China); Shirui Sheng (Nanyang Technological University, Singapore); Kwen Siong Chong (Singapore); Bah Hwee Gwee (NTU, Singapore); Chao Wang (Huazhong University of Science and Technology, China)

Oral

10:00 AM

1571273548

Bit Error Tolerance Analysis of High Inference Accuracy AI Using Low-Voltage Floating-Point SRAM-CIM

Tetsuro Mizuno, Seiji Adachi, Yoshinari Wada, Ayane Matsuzaki, Kota Ando, Tetsuya Asai and Takao Marukame (Hokkaido University, Japan)

Oral

10:15 AM

1571274583

A Sparsity-Aware Adaptive Column Replication Framework for Reliable and Energy Efficient RRAM CIM Design

Hyeon-gwon Kim, Seung-Eon Hwang, Dongwoo Lew and Jongsun Park (Korea University, Korea (South))

Oral

10:30 AM

Tea Break (15 minutes)

10:45 AM - 11:45 AM

Session #25: Neuromorphic and bioinspired circuits, processors, systems, and their applications II (6 papers)
Venue: Panorama 1
Chairs: Tran-Thuat Nguyen, VNU, Vietnam

Time

Paper #

Title

Authors

Type

10:45 AM

1571268340

A Spiking Neuromorphic Architecture for Belief Propagation Decoding of LDPC Codes

Shiang-Yi Chi (National Yang Ming Chiao Tung University, Taiwan); Li-wei Liu and Hsie-Chia Chang (National Chiao Tung University, Taiwan)

Oral

11:00 AM

1571268354

A 1k-Neuron 16bit Edge-FPGA-SoC Reservoir Computing Processor Exceeding 1Msps Input Rate by Zero Skipping for Variable Unstructured Sparsity

Takashi Oshima (Hitachi Ltd., Japan); Yuya Takanuki and Kunihiro Fujisaki (Hitachi Information & Telecommunication Engineering, Ltd., Japan)

Oral

11:15 AM

1571268386

A Firework Inspired Routing Scheme with Single-Packet in-Network Phase Transition for Neuromorphic Systems

Qi Jiang, Fanxi Yang, Lufei Fan, Yi Zheng, Yuhan He, Xun He, Xiaoze Yan and Xirui Peng (Fudan University, China); Hannu Tenhunen (KTH Royal Institute of Technology, Sweden & Ingenium Machina Ltd., Finland); Lirong Zheng (Fudan University, China); Zhuo Zou (Fudan University & KTH Royal Institute of Technology, Sweden)

Oral

11:30 AM

1571268466

PSA: A Pruning-Friendly Sparse-Aware Accelerator for Efficient Sparse Convolution in SNNs

Sanhe Fu and Kainan Wang (Zhejiang University, China); Bo Wang (Singapore University of Technology and Design, Singapore); Aili Wang (Zhejiang University, China)

Oral

11:45 AM

1571273646

RHYME: A Resource-Efficient Hybrid Neuromorphic Hardware System for EMG Gesture Classification

Yuvraj Chowhan (Indian Institute of Technology (IIT) Delhi, India); Chithambara Moorthii J and Anmol Singla (Indian Institute of Technology Delhi, India); Manan Suri (Indian Institute of Technology - Delhi, India)

Oral

12:00 PM

1571273836

L-SPINE: A Low-Precision SIMD Spiking Neural Compute Engine for Resource-Efficient Edge Inference

Sonu Kumar and Mukul Lokhande (Indian Institute of Technology Indore, India); Santosh Kumar Vishvakarma (IIT, Indore, India)

Oral

10:45 AM - 11:45 AM

Session #26 Special Session: Compute-in-Memory Co-Design: From Emerging Devices to AI Application Optimization II (4 papers)
Venue: Panorama 2
Chairs: Qing Zhang, Shenzhen University, China

Time

Paper #

Title

Authors

Type

10:45 AM

1571274967

Explainable and Robust Fake-News Detection System via LLM-Based Credibility and Context Analyses

Tzu-Shuo Peng, Oscal Tzyh-Chiang Chen and Yu Hsiang Hung (National Chung Cheng University, Taiwan); Manh-Hung Ha (Vietnam National University, Vietnam)

Oral

11:00 AM

1571275092

A Hardware-Aware Optimized YOLOv8 for Real-Time Crack Detection at the Edge

Jingjun Sun, Tan Peng, Jiawen Chen, Bashir M. Al-Hashimi and Kai Xu (Kings College London, United Kingdom (Great Britain))

Oral

11:15 AM

1571275722

Process Variation in Probabilistic Compute-in-Memory: Challenge and Opportunity

Steven Davis, Zephan M. Enciso, Likai Pei and Ningyuan Cao (University of Notre Dame, USA)

Oral

11:30 AM

1571275830

CIMERA: Compute-In-Interconnect and Memory with Reconfigurable Precision for LLM Inference

Yue Jiet Chong, Yimin Wang, Wei Zhang and Xuanyao Fong (National University of Singapore, Singapore)

Oral

12:15 PM

Lunch

1:30 PM - 5:15 PM

Workshop #1: The 2nd IEEE Chiplet Workshop on Circuits and Systems for Next-Generation AI Computing
Venue: Panorama 1
Chairs: Chixiao Chen, Fudan University, China; Anh Tuan Do, A*STAR, Singapore.

Time

Paper #

Title

Authors

Type

1:30 PM

 

Opening Remarks

 

 

1:40 PM

CSNAIC-1

The Carbon cost of Specialization: Rethinking AI Hardware in the Chiplet Era

Tulika Mitra, National University of Singapore

Oral

2:20 PM

CSNAIC-2

Scalable 3D Compute-in/near-Memory Systems with Reusable Active Interposer

Chixiao Chen, Fudan University

Oral

3:00 PM

CSNAIC-3

Low-Power Wireline/Optical Transceivers for Next-Generation AI Applications

Quan Pan, Southern University of Science and Technology

Oral

3:40 PM

Tea Break (15 minutes)

3:55 PM

CSNAIC-4

Progress on Crosstalk Cancellation Techniques for High-Speed Parallel Interconnects

Yuan Du, Nanjing University

Oral

4:35 PM

CSNAIC-5

A 16Gb/s/pin 0.51pJ/bit Single-Ended NRZ Transceiver with VDDQ Ripple Compensation for Memory Interfaces

Wenning Jiang, Fudan University

Oral

 

 

 

 

 

1:30 PM - 2:00 PM

Industry talk: HiFloat Data Format Principles, Practices and Standards
Haonan Zhang, Huawei, China
Venue: Panorama 2
Chairs: Manh-Hiep Dao, VNU, Hanoi

2:00 PM - 5:15 PM

Workshop #2: Smart Sensor Circuit and Intelligent Systems for Emerging Applications
Venue: Panorama 2
Chairs: Qing Zhang, Shenzhen University, China; Milin Zhang, Tsinghua University, China

Time

Paper #

Title

Authors

Type

2:00 PM

 

Opening Remarks

 

 

2:10 PM

S2CAS-1

Neuromorphic Smart Nose-on-a-Chip with On-Chip Learning for Pulmonary Diagnosis

Hong Chen, Tsinghua University, China

Oral

2:55 PM

S2CAS-2

Towards Trustworthy In-Vehicle AI Systems: Dynamic Watermarks for Real-Time Intrusion Detection

Yi (Estelle) Wang, AUMOVIO, Singapore

Oral

3:40 PM

Tea Break

3:55 PM

S2CAS-3

Ultra-Low-Power and High Accuracy AI Voice Control Solution: Co-Optimization of Algorithm, Hardware and Toolchain for Edge AI Devices

Jianbiao Xiao, Chip-Artisan Tech. Corp., China

Oral

4:40 PM

S2CAS-4

Approximate Computing Circuit Techniques in Efficient Smart Edge Systems - from Biomedical/Vision Recognition to SAR Imaging

Weiwei  Shi, Shenzhen University, China

Oral